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SAA7818HL
DVD and CD playback IC
Rev. 03 -- 25 November 2004 Product data sheet
1. General description
The SAA7818HL is a device for 6 x DVD and 18 x CD playback applications. This device contains an embedded microcontroller which can operate as a 33 MHz or 67 MHz equivalent 80C51 and interfaces to the channel decoder, block decoder and servo processor. New features enable superior playability in both CD and DVD modes. The block decoder has an embedded DVD video authentication module and supports up to 64 Mbit of external SDRAM memory. The data can be fed out in a number of different configurations including I2S-bus, ATAPI and UDE. This device also includes the option to bypass the external memory altogether, creating a bufferless ATAPI or UDE data path solution. The channel decoder has selectable differential and single-ended HF inputs, which are compatible with the TZA1036 and TZA1038 devices. There is an option to output the data as raw I2S-bus via some programmable data I/O pins. With increased tap setting for the PLL equalizer compared with the SAA7816 device and enhanced playability of black dots and scratches, overall playability has been greatly improved. There are also benefits due to a new defect detector that allows holding the HF PLL frequency and slicer settings over a defect. These, together with an additional limit equalizer lead to improved tolerance to continuity errors in DVD playback mode. There are also two extra motor gain settings compared to the SAA7816 device and support for copyright protection strategies in games applications. The servo processor has been upgraded to include an improved defect detection and handling process, an integrated envelope detection circuit and also DC offset compensation on the diode inputs.
2. Features
s Host interface: x Supports ATAPI interface x Configurable as generic DMA interface; for use with external host interface devices x Automatic determination of block length for mode 2; form 1 and form 2 sectors; block length transferred is programmable x Supports synchronous UDE interface x Supports bufferless mode. s Block decoder: x Supports CD-ROM, CDr, CD-DA, VCD, SVCD, CD-I, photo CD and DVD video formats
Philips Semiconductors
SAA7818HL
DVD and CD playback IC
s
s
s
s
x Supports real-time error detection and correction in hardware for CD-ROM mode x CD-ROM error corrector switchable between single or dual pass; both with Error Detection/Correction (EDC) x Internal registers are memory mapped x Embedded DVD video authentication module. Buffer memory controller: x Support for up to 64 Mbit external SDRAM memory x Block based sector addressing. Channel decoder: x Selectable differential and single-ended HF inputs; compatible with the TZA1036 and TZA1038; single-ended input has bypassable AGC x Internal 8-bit ADC x Digital PLL and slicer for HF clock regeneration x Supports EFM and EFM+ demodulation x Full CD error correction strategy; t = 2 and e = 4 x On-chip CD error corrector memory with 8 frame jitter margin x Built-in hardware for double pass DVD error corrector; can correct 5 errors in C1 frame; 16 errors in C2 frame x Error corrector monitor signal available x I2S-bus output available via programmable vampire pins x Programmable frame sync loss indication x Increased tap settings for PLL equalizer compared with SAA7816 x Enhanced playability of black dots and scratches with improved defect detector; it enables the HF PLL frequency, slicer, high-pass filter, AGC and offset loops to be held when a defect is detected x Improved tolerance to continuity errors in DVD play mode x Limit equalizer x Two extra motor gain settings compared to SAA7816 x Support for copyright protection strategy for games applications x Hardware AGC loop, in combination with front-end IC (TZA1038) x Hardware automatic offset compensation loop, in combination with front-end IC (TZA1038) x Average jitter can be read back x Internal digital high-pass filter on HF input, with programmable cut-off frequencies x Run Length 3 (RL3) pushback feature x PLL monitor signal available x Interpolate and hold on audio output. Spindle motor control: x Advanced motor control loop allows CAV, CLV and pseudo-CLV playback x Support for 3-pin and 1-pin tacho control x Motor control via incoming bitstream or tacho. Speed operation: x Supports 18 x CD-ROM playback x Supports 6 x DVD-ROM playback.
9397 750 14312
(c) Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 -- 25 November 2004
2 of 30
Philips Semiconductors
SAA7818HL
DVD and CD playback IC
s Multimedia functions: x Supports audio playback via DRAM buffer; allows audio discs to be played at higher speeds x IEC 60958 (SPDIF, AES/EBU and DOBM) output with Q-W subcode and programmable category code; output at n = 1 rate x Audio output via I2S-bus vampire interface: 4 x oversampling filter, digital volume control, attenuator and mute. s Microcontroller interface: x Embedded microcontroller can operate as 33 MHz or 67 MHz equivalent 80C51 x Embedded co-processor for fast multiply, divide, shift and normalize instructions; supported by C-compilers x Co-processor for MSF calculations x Memory mapped interfaces to sub functions x External microcontroller support x Embedded SRAM: 1.5 kbytes Xdata, 512 bytes Idata, 224 bytes data and registers x 4 banks; on Idata and registers, for better multi-tasking support x External flash EPROM programming support: serial boot possible with empty flash EPROM and internal program upload support x Code space support up to 1 Mbyte through built-in bank switching x Debug interface for embedded microcontroller. s Servo processor: x Switched current Analog-to-Digital Converters (ADCs) for diode and error signal inputs x Selectable servo error or servo diode inputs x Focus and radial servo loops x Automatic closed-loop gain control available for focus and radial loops x Built-in access procedure with fast track count input x High-speed track crossing velocity measurement (> 350 kHz) for CD and DVD x Special DVD track crossing support x Fast radial brake circuitry x Eight-to-Fourteen Modulation (EFM) actuator damping circuitry x Sledge motor servo loop with enhanced PCS support x Sledge stepper motor support x Adaptive Repetitive Control (ARC) x Debug interface for servo x DC offset compensation for servo x White and black dot defect detection and handling x Integrated envelope detection. s Clock multiplier: x On-chip clock multipliers allows the use of 8.4672 MHz crystal.
9397 750 14312
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Product data sheet
Rev. 03 -- 25 November 2004
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Philips Semiconductors
SAA7818HL
DVD and CD playback IC
3. Quick reference data
Table 1: Symbol VDDD(C) VDDD(P) VDDA IDDA IDDD(P) IDDD(C) fxtal Tamb Tstg Quick reference data Parameter digital supply voltage for core digital supply voltage for pad cells (3 V) analog supply voltage analog supply current digital supply current for pad cells digital supply current for core crystal frequency ambient temperature storage temperature Conditions Min 1.65 3.0 3.0 7 -40 -55 Typ 1.8 3.3 3.3 65 135 55 Max 1.95 3.6 3.6 +85 +125 Unit V V V mA mA mA MHz C C
8.4672 9
4. Ordering information
Table 2: Ordering information Package Name SAA7818HL LQFP208 Description plastic low profile quad flat package; 208 leads; body 28 x 28 x 1.4 mm Version SOT459-1 Type number
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Product data sheet
Rev. 03 -- 25 November 2004
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Product data sheet Rev. 03 -- 25 November 2004
(c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. 9397 750 14312
5. Block diagram
Philips Semiconductors
CHANNEL DECODER CD/DVD ERCO ADC BIT DETECTOR AND DEMODULATOR
BLOCK DECODER DRAM INTERFACE DRIVE INTERFACE MEMORY PROCESSOR ERCO INTERFACE MULTIMEDIA INTERFACE MEMORY PROCESSOR HOST INTERFACE
MOTOR/TACHO INTERFACE SUBCODE INTERFACE
CSS MODULE
CONTROL REGISTERS
CPU INTERFACE
MICROCONTROLLER SERVO ADC PCS ACCELERATOR RAM SERVO PROCESSOR SERVO ACCELERATOR ADDRESS DECODER CPU
ADC
1.5 kbytes AUXILLIARY RAM
1.5 kbytes ROM
736 bytes RAM
DVD and CD playback IC
SAA7818HL
SFRs
PORT REGISTER
mdb204
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Fig 1. Block diagram.
Philips Semiconductors
SAA7818HL
DVD and CD playback IC
6. Pinning information
6.1 Pinning
208 157 156
1
SAA7818HL
52 104 53
105
001aab845
Fig 2. Pin configuration.
6.2 Pin description
Table 3: Symbol POR_NEG BCA MOTO1 T1 T2 T3 VDDD(P1) VSSD(P1) TEST1 TEST2 VDDA1 HFIN_DN HFIN_DP HFIN_SE VSSA1 VCOM VDDA2 ALPHA0 CRIN CROUT VSSA2 IREF
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Pin description Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 Type [1] I I O I I I P P I I P AI AI AI P AO P AO AI AO P AO M T T T Drive/ Description threshold Power-on reset input; active LOW BCA input (mode 2 = SCCLK; mace_debug = opc_int) motor control output tacho 1 input tacho 2 input tacho 3 input digital supply voltage 1 for the pad cells (3.3 V) digital ground 1 for the pad cells test input 1 (internal pull-down resistor) test input 2 (internal pull-down resistor analog supply voltage 1 (3.3 V) negative differential HF input positive differential HF input single-ended HF input (AGC) analog ground 1 common mode reference output (TZA1038) analog supply voltage 2 (3.3 V) DAC output clock input clock output analog ground 2 reference current output
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Product data sheet
Rev. 03 -- 25 November 2004
6 of 30
Philips Semiconductors
SAA7818HL
DVD and CD playback IC
Pin description ...continued Pin 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 Type [1] AI AI AI AI AI AI P AI P AI AI AI AI AI AI AI/O AI P P B B B B B B B B O P P O O O O O O P P M M M M M M M/T M/T M/T M/T M/T M/T M/T M/T Drive/ Description threshold upper reference input voltage for ADC ladder sine input from hall detectors cosine input from hall detectors auxiliary ADC input EMF of the actuator; positive input EMF of the actuator; negative input analog supply voltage 3 (3.3 V) decoupling point for ADC ladder analog ground 3 diode input 1 diode input 2 or normal track-loss signal diode input 3 or normal radial error signal diode input 4 or normal focus error signal satellite diode input 1/normal mirror signal satellite diode input 2 I/O reference voltage for servo ADC track count input digital ground 2 for the pad cells digital supply voltage 2 for the pad cells (3.3 V) defect output or general purpose I/O defect input or general purpose I/O track-loss measure output or general purpose I/O radial polarity or focus OK or general purpose I/O CS external SRAM or general purpose I/O servo clock output or general purpose I/O I2C-bus data or general purpose I/O I2C-bus clock or general purpose I/O internal/external microcontroller clock [mace_debug = int1 (PLUM)] digital supply voltage 3 for the pad cells (3.3 V) digital ground 3 for the pad cells radial output (3-state during reset) focus output (3-state during reset) sledge output (3-state during reset) disconnects radial actuator (1 = disconnect) PDM reference signal output; removes DC offset from sin_phi PDM reference signal output; removes DC offset from cos_phi digital supply voltage 4 for the pad cells (3.3 V) digital ground 4 for the pad cells
(c) Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Table 3: Symbol UOPT SIN_PHI COS_PHI XDET
ACT_EMFP ACT_EMFN VDDA3 UOPB VSSA3 D1 D2_TLN D3_REN D4_FEN S1_MIRN S2 VRIN FTCH VSSD(P2) VDDD(P2) P5_7_DEFO_N P5_6_DEFI_N P5_5_TL P5_4_RP_FOK P5_3_CE1 P5_2_CLO P5_1_SDA P5_0_SCL SCCLK VDDD(P3) VSSD(P3) RA FO SL RAC_SW REF_SIN REF_COS VDDD(P4) VSSD(P4)
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Philips Semiconductors
SAA7818HL
DVD and CD playback IC
Pin description ...continued Pin 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 Type [1] B B B B B B P P B B B B B B B B P P B O B B P P B B B B B B B M/T M/T M/T M/T M/T M/T M/T M/T M M/T M/T M/T M/T M/T M/T M/T M/T M/T M/T Drive/ Description threshold M/T M/T M/T M/T M/T M/T timer 2 input enable or SILD for TZA1038 timer 2 clock input or SICL for TZA1038 timer 1 clock input or SIDA for TZA1038 timer 0 clock input or CS2 for external device general purpose I/O general purpose I/O digital supply voltage 1 for the core (1.8 V) digital ground 1 for the core Port 1; demultiplexed lower microcontroller address lines; bit 0 Port 1; demultiplexed lower microcontroller address lines; bit 1 (mode 3 = SCCLK) Port 1; demultiplexed lower microcontroller address lines; bit 2 (mode 3 = OTD) Port 1; demultiplexed lower microcontroller address lines; bit 3 (mode 3 = DEB_OUT) Port 1; demultiplexed lower microcontroller address lines; bit 4 (mode 3 = MON_A) Port 1; demultiplexed lower microcontroller address lines; bit 5 (mode 3 = MON_D) Port 1; demultiplexed lower microcontroller address lines; bit 6 (mode 3 = vampire 6 to SYNC) Port 1; demultiplexed lower microcontroller address lines; bit 7 (mode 3 = vampire 7 to V4) digital supply voltage 5 for the pad cells (3.3 V) digital ground 5 for the pad cells address input or wait output (internal pull-up resistor) microcontroller reset output [mace_debug = int0 (HDR66/PLUM)] programmable strobe enable or output; enable for external device (internal pull-up resistor) address latch or chip select (internal pull-up resistor) digital supply voltage 2 for the core (1.8 V) digital ground 2 for the core Port 2; upper microcontroller address line; bit 12 Port 2; upper microcontroller address line; bit 15 A16 to EPROM A17 to EPROM Port 2; upper microcontroller address line; bit 14 Port 2; upper microcontroller address line; bit 13 Port 2; upper microcontroller address line; bit 8
(c) Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Table 3: Symbol
P4_7_PXT2EN P4_6_PXT2 P4_5_PXT0 P4_4_PXT P4_3_A19 P4_2_A18 VDDD(C1) VSSD(C1) UA0_P1_0 UA1_P1_1 UA2_P1_2 UA3_P1_3 UA4_P1_4 UA5_P1_5 UA6_P1_6 UA7_P1_7 VDDD(P5) VSSD(P5) EAN_WAITN DSDEN_SRST PSENN_CS ALE_ASTB VDDD(C2) VSSD(C2) UA12 UA15 P4_0_A16 P4_1_A17 UA14 UA13 UA8
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Product data sheet
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Philips Semiconductors
SAA7818HL
DVD and CD playback IC
Pin description ...continued Pin 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 Type [1] B B B P P B B B B B B B B P P B B B B B B B B P P I B B B B B AL/T AL/T AL/T AL/T AL/T M/T M/T M/T M/T M/T M/T M/T M/T M/T M/T M/T M/T M/T M/T M/T M/T Drive/ Description threshold M/T M/T M/T Port 2; upper microcontroller address line; bit 9 Port 2; upper microcontroller address line; bit 11 Port 2; upper microcontroller address line; bit 10 digital supply voltage 6 for the pad cells (3.3 V) digital ground 6 for the pad cells Port 0; multiplexed microcontroller data/lower address line; bit 7 Port 0; multiplexed microcontroller data/lower address line; bit 6 Port 0; multiplexed microcontroller data/lower address line; bit 5 Port 0; multiplexed microcontroller data/lower address line; bit 4 Port 0; multiplexed microcontroller data/lower address line; bit 3 Port 0; multiplexed microcontroller data/lower address line; bit 2 Port 0; multiplexed microcontroller data/lower address line; bit 1 Port 0; multiplexed microcontroller data/lower address line; bit 0 digital supply voltage 7 for the pad cells (3.3 V) digital ground 7 for the pad cells read signal input or general purpose I/O write signal output or general purpose I/O UART 2 transmit line output or general purpose I/O UART 2 receive line input or general purpose I/O interrupt 1 input or general purpose I/O interrupt 0 input or general purpose I/O UART 1 transmit line output or general purpose I/O UART 1 receive line input or general purpose I/O digital supply voltage 3 for the core (1.8 V) digital ground 3 for the core host reset input host interface/generic DMA; bit 7 host interface/generic DMA; bit 8 (mode 1 = MEAS_CFLG) host interface/generic DMA; bit 6 host interface/generic DMA; bit 9 (mode 1 = MEAS1) host interface/generic DMA; bit 5
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Table 3: Symbol UA9 UA11 UA10 VDDD(P6) VSSD(P6) UDA7 UDA6 UDA5 UDA4 UDA3 UDA2 UDA1 UDA0 VDDD(P7) VSSD(P7) P3_7_RDN
P3_6_WRN P3_5_TXD2 P3_4_RXD2 P3_3_INT1 P3_2_INT0 P3_1_TXD1 P3_0_RXD1 VDDD(C3) VSSD(C3) HRESET DD7 DD8 DD6 DD9 DD5
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Product data sheet
Rev. 03 -- 25 November 2004
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Philips Semiconductors
SAA7818HL
DVD and CD playback IC
Pin description ...continued Pin 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 Type [1] B B B P P B B B B B B B B P P O I I O I O O B P P B B B B B B O P AL/T AL/T AL/T AL/T AL/T AL/T M AL T T AH T AH AH AL/T AL/T AL/T AL/T AL/T AL/T AL/T AL/T AL/T Drive/ Description threshold AL/T AL/T AL/T host interface/generic DMA; bit 10 (mode 1 = MON_A) host interface/generic DMA; bit 4 host interface/generic DMA; bit 11 (mode 1 = MON_D) digital supply voltage 8 for the pad cells (3.3 V) digital ground 8 for the pad cells host interface/generic DMA; bit 3 host interface/generic DMA; bit 12 (mode 1 = DEB_OUT) host interface/generic DMA; bit 2 host interface/generic DMA; bit 13 (mode 1 = OTD) host interface/generic DMA; bit 1 host interface/generic DMA; bit 14 (mode 1 = SCCLK) host interface/generic DMA; bit 0 host interface/generic DMA; bit 15 (mace_debug = servo_int) digital supply voltage 4 for the core (1.8 V) digital ground 4 for the core host DMA request or generic DMA acknowledge host interface input write strobe host interface input read strobe host interface ready output host DMA acknowledge or generic DMA request input host interface interrupt request output host interface 8/16-bit Port output host address bit 1 or generic write digital supply voltage 9 for the pad cells (3.3 V) digital ground 9 for the pad cells host interface passed test input/output (mode 1 = SYNC) host address bit 0 input/output host address bit 2 or generic read host interface chip select 0 input/output host interface chip select 1 input/output host interface active slave present input/output (mode 1 = V4) IEC 60958 output or CL1 output from HDR66 digital supply voltage 10 for the pad cells (3.3 V)
Table 3: Symbol DD10 DD4 DD11 VDDD(P8) VSSD(P8) DD3 DD12 DD2 DD13 DD1 DD14 DD0 DD15 VDDD(C4) VSSD(C4)
DMARQ_GACK DIOW DIOR IORDY DMACK_GRQ INTRQ IOCS16 DA1_GWR VDDD(P9) VSSD(P9) PDIAG DA0 DA2_GRD CS0 CS1 DASP IECO_CL1 VDDD(P10)
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Product data sheet
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Philips Semiconductors
SAA7818HL
DVD and CD playback IC
Pin description ...continued Pin 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 Type [1] P O O O O O P P B B B B B B B B P P O O O O O O O O O P P B B B B B B B B P P O M M/T M/T M/T M/T M/T M/T M/T M/T M M M M M M M L M M/T M/T M/T M/T M/T M/T M/T M/T L L L L L Drive/ Description threshold digital ground 10 for the pad cells DRAM address output; bit 3 DRAM address output; bit 2 DRAM address output; bit 1 DRAM address output; bit 0 DRAM address output; bit 10 digital supply voltage 11 for the pad cells (3.3 V) digital ground 11 for the pad cells DRAM data bus input/output; bit 2 DRAM data bus input/output; bit 1 DRAM data bus input/output; bit 0 DRAM data bus input/output; bit 3 DRAM data bus input/output; bit 4 DRAM data bus input/output; bit 5 DRAM data bus input/output; bit 6 DRAM data bus input/output; bit 7 digital supply voltage 5 for the core (1.8 V) digital ground 5 for the core SDRAM data mask output LOW DRAM write strobe output DRAM RAS strobe output SDRAM chip select output DRAM CAS strobe output DRAM address output; bit 12 DRAM address output; bit 13 SDRAM clock output SDRAM data mask output HIGH digital supply voltage 12 for the pad cells (3.3 V) digital ground 12 for the pad cells DRAM data bus input/output; bit 8 DRAM data bus input/output; bit 9 DRAM data bus input/output; bit 10 DRAM data bus input/output; bit 11 DRAM data bus input/output; bit 12 DRAM data bus input/output; bit 15 DRAM data bus input/output; bit 14 DRAM data bus input/output; bit 13 digital supply voltage 6 for the core (1.8 V) digital ground 6 for the core DRAM address output; bit 11
(c) Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Table 3: Symbol VSSD(P10) XDA3 XDA2 XDA1 XDA0 XDA10 VDDD(P11) VSSD(P11) XDD2 XDD1 XDD0 XDD3 XDD4 XDD5 XDD6 XDD7 VDDD(C5) VSSD(C5) LDQM XWR XRAS SDCS XCAS XDA12 XDA13 SDCK UDQM VDDD(P12) VSSD(P12) XDD8 XDD9 XDD10 XDD11 XDD12 XDD15 XDD14 XDD13 VDDD(C6) VSSD(C6) XDA11
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Philips Semiconductors
SAA7818HL
DVD and CD playback IC
Pin description ...continued Pin 196 197 198 199 200 201 202 203 204 205 206 207 208 Type [1] O O O O O O P P B B B B B M/T M/T M/T M/T M/T Drive/ Description threshold M M M M M M DRAM address output; bit 9 DRAM address output; bit 8 DRAM address output; bit 7 DRAM address output; bit 6 DRAM address output; bit 5 DRAM address output; bit 4 digital supply voltage 13 for the pad cells (3.3 V) digital ground 13 for the pad cells I2S-bus flag input/output (mode 2 = DEB_OUT) multimedia master clock input/output (mode 2 = MEAS_CFLG) I2S-bus data input/output (mode 2 = MON_A) I2S-bus word clock input/output (mode 2 = MEAS1) I2S-bus bit clock input/output (mode 2 = MON_D)
Table 3: Symbol XDA9 XDA8 XDA7 XDA6 XDA5 XDA4 VDDD(P13) VSSD(P13) FLAG MCK DATA_SDI
WCLK_WSI BCLK_SCKI
[1]
See Table 4 for the pin type definition.
Table 4: Type I O OD B T AI AO P
Pin type definition Definition input output open-drain bidirectional 3-state output analog input analog output power connection; all supply pins must be connected to the same external power supply voltage
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Product data sheet
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Philips Semiconductors
SAA7818HL
DVD and CD playback IC
7. Register and memory map
The internal registers are SFRs within the address space of the internal microcontroller. They are accessed in the same way as standard 80C51 SFRs. The external registers and memory spaces make up the external memory map of the internal microcontroller. Some of the memory spaces are on-chip and some are in the external DRAM. All registers are addressed as external memory space with respect to the internal microcontroller.
Table 5: ADDR (hex) 0080 0088 0090 0098 00A0 00A8 00B0 00B8 00C0 00C8 00D0 00D8 00E0 00E8 00F0 00F8 Internal registers 0/8 P0 TCON P1 SCON P2 P3 SCON2 T2CON TLS_CNTL SSR ACC PORT4 P5 1/9 SP TMOD SBUF P2SFR SBUF2 T2MOD CSCNTRL SCR MD0 DDR1 2/A DPL TL0 INTLATCH RCAP2L CSWAIT MD1 DDR5 DDR4 3/B DPH TL1 INTEN RCAP2H MD2 DDR0 4/C TH0 TL2 MD3 DACDEB DDR2 5/D TH1 TH2 MD4 CONFIG4 DDR3 6/E CLK_GEN MD5 CONFIG3 CONFIG 7/F PCON DIV17 ARCON CONFIG2
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Product data sheet
Rev. 03 -- 25 November 2004
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Product data sheet Rev. 03 -- 25 November 2004
(c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. 9397 750 14312
Philips Semiconductors
Table 6: ADDR (hex) 0000 : 05F8 0600 : BFF8 C000 C008 C010 C018 C020 C028 C030 C038
External registers and memory space 0/8 1/9 2/A 3/B 4/C 5/D 6/E 7/F
auxiliary RAM (internal)
external DRAM (PLUM subpage 1)
TIME_KEEPER RAD_INT_LO FOCUS_INT_HI RAMP_HEIGHT
FOC_STAT RAD_OFFSET_ HI
RAD_STAT RAD_ERROR_ GAIN_MEM_HI
MEM_ SLEDGE1_HI TPI_GAIN_HI FOC_PROP_ MEM reserved SP_MEM_LO STACK5 MEM_ SLEDGE2_LO SLEDGE_OUT_ MEM SLEDGE_ PULSE_MEM reserved
DIST_LO FOCUS_ ERROR_MEM
DIST_HI RAD_ERROR_ MEM
MEM_ SLEDGE1_LO SPEED_HI RAMP_MEAN_ VALUE RAD_INT_ GAIN_MEM TPI_SIGNAL_ MEM STACK2 SLEDGE_ MULT_MEM2 reserved
RAD_INT_HI SPEED_LO SLEEP_MULT_ MEM SPEED_MULT_ MEM RAD_CTRL_1_ MEM2 STACK1 FAST_SPEED FOCUS_INT_ MEM1 XTRA_PRESET
FOCUS_INT_LO DROP_OUT_ CODE FE_LEVEL TIMER TPI_GAIN_LO RAD_GAIN_ MEM STATE_MULT_ MEM reserved
FOCUS_PROP_ FOC_INT_GAIN MULT RAD_PROP_ MULT_MEM SP_MEM_HI STACK4 MEM_ SLEDGE2_HI reserved RAD_ERROR_ ACC_MEM SPEED_ SETPOINT STACK3 RAMP_INCR reserved
RAD_OFFSET_L RAD_ERROR_ O GAIN_MEM_LO RAD_CTRL_1_ MEM STACK0 MEM_ SLEDGE2_LO_ LO INTERRUPT REG reserved reserved OLDCOM reserved
C040
reserved
reserved
reserved
SPEED_ DREMPEL_ MEM reserved INJECTLEVEL1 OFFTRACK_MI LOC_HI
HOLD_MULT_ MEM SLEDGE_ POWER_MEM INJECTLEVEL2 OFFTRACK_LO ACT_FF
DVD and CD playback IC
SAA7818HL
C048 C050 C058 C060
reserved
reserved
SLEDGE_ LONG_BRAKE AGCFREQ OFFTRACK_HI LOC_MI
RAD_MEM_ PART1 OSC MIRN_MEM PCS_FF_ STROKE
SLEDGE_ FOCUS_INJECT RADIAL_INJECT DET_PHASE PULSE_HEIGHT AGCGAINMEM PCS_STAT AGCGAINLO START_LO FOCUS_ OFFSET_AGC START_HI INJECT_LO LOC_LO
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Table 6: ADDR (hex) C068 C070 C078 C080 : C0A8 C0B0 C0B8
Rev. 03 -- 25 November 2004
(c) Koninklijke Philips Electronics N.V. 2004. All rights reserved.
External registers and memory space ...continued 0/8 PCS_SPEED_ GAIN PCS_ACC_ STEP RE_FILTER_ MEM reserved 1/9 SPEED_ SETPOINT_LO PCS_ACC_ JUMP FE_FILTER_ MEM 2/A SPEED_ SETPOINT_HI VEL_ROOT_HI 3/B reserved VEL_ROOT_LO 4/C reserved PCS_STP_POS 5/D PCS_PD PCS_STP_NEG EMF_DAMP_ MEM 6/E PCS_PD_INT FOCUS_ OFFSET RACSWITCH_ MEM 7/F PCS_PD_ INT_LO PROT_STAT PCS_SEN
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RE_DET_LEVEL FE_DET_LEVEL EMFREAD_ MEM
ARC_STAT DEFECT CNTRL1 MIR_FIL_ BLACK_HI CALF_PROBE_ HI TLSLICECNTR
ARC_FOC_IN DEFECT CNTRL2 MIR_FIL_ BLACK_LO CALF_PROBE_ LO DECAY_RATE
ARC_RAD_IN DEFECT CNTRL3 MIR_FIL_ WHITE_HI reserved ACTUAL_DIFF PP_TPI_FIL_ PROBE_HI OPC_CTRL2 OPC_EMFH DEBUG2 reserved
ARC_FOC_OUT ARC_RAD_OUT ARC_FOC_DIFF ARC_RAD_DIFF ARC_ANG HF_ENVELOPE MIR_FIL_ WHITE_LO reserved FORCED_DIFF PP_TPI_FIL_ PROBE_LO OPC_REPEAT OPC_EMFL DEBUG3 reserved ALPHA0_DAC REG_FBK_ BLACK_HI reserved AUX_ADC reserved OPC_DELAY OPC_DEL_ACT reserved reserved CONTROL_REG CALF_FORMAT REG_FBK_ BLACK_LO reserved PCS_HALL_PH reserved OPC_ADR_ START OPC_TIML reserved reserved REG_FBK_ WHITE_HI reserved PEAK_PROBE DEFECT_ COUNTER OPC_ADR_ STOP OPC_TIMH reserved reserved CNF_TEST_ VALUE REG_FBK_ WHITE_LO reserved BOTTOM_ PROBE DEFECT_ SIGNALS OPC_ALPHA0_ START reserved reserved reserved
C0C0 C0C8 C0D0 C0D8 C0E0 C0E8 C0F0 C0F8 C100 : CFF8 D000 : DFF8
PP_TPI_PROBE reserved OPC_STAT OPC_ALHPA0_ STEP DEBUG0 reserved inaccessible OPC_CTRL1 OPC_PW_LPF DEBUG1 reserved
DVD and CD playback IC
SAA7818HL
external DRAM (PLUM subpage 2)
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx
Table 6: ADDR (hex) E000 : FCF8 FD00 FD08 FD10 FD18 FD20 FD28 : FD50 FD58 reserved DRAM_MODE/ DRAM_FEAT/ DRAM_COLW reserved
Rev. 03 -- 25 November 2004
(c) Koninklijke Philips Electronics N.V. 2004. All rights reserved.
External registers and memory space ...continued 0/8 1/9 2/A 3/B 4/C 5/D 6/E 7/F
Product data sheet 16 of 30
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external DRAM (PLUM subseg n)
BUFFERBASE ACQ_AUTO_ CTRL ACQAUTO_ INTEN BYTESPER SECTOR(H) MATHPROC reserved STRMSTRTADDR NXTXFR_ADDR TAGSCAN_ MASK TAGSCAN_ CNTL
BUFFERTOP
TAGGED_CNT/ TAGGED_CNT_UPD STRMSTOPADDR ENDXFR_ADDR/REM_CNT
UNTAGGED_CNT/ UNTAGGED_CNT_UPD ACQAUTO_INT BYTESPER SECTOR(L) ACQMISS_STAT HOST_AUTO_ CTRL
TAGSCAN_ VALUE TAGSCAN_ OFFS_H
MHEAD TAGSCAN_ OFFS_L MATCHED_ COUNT reserved
FD60 FD68 FD70 FD78 FD80 FD88 FD90 FD98 FDA0
reserved CAM_CMD/ CAM_STAT reserved AGCBW DEFIRA1 SIFCONTROL OFFSET_LVL GLUE1 AGCTHR_HI DEFIRA2 SERIF1 HFMAX_PEAK PORTADATA/ PORTAREAD AGCTHR_LO DEFIRA3 SERIF2 HFMIN_PEAK PORTAMODE AGCTHR_HI2 HIGHPASS SERIF3 HF_DETECT4 reserved AGC_TIMHI OFFSETCONT HF_DETECT1 DECSTATUS3 DC_CONTROL HF_AMPLITUDE AGC_SET OFFSETDATA HF_DETECT2 HF_DETECT5 DC_VALUE OFFSET BOUND HF_DETECT3 HF_DETECT6 D1_OFFSET DEFIRA0 CAM_DAT reserved
DVD and CD playback IC
SAA7818HL
OFFSET SETTING AGCDAC_DIV OFFSETBW D2_OFFSET
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx
Table 6: ADDR (hex) FDA8 External registers and memory space ...continued 0/8 D3_OFFSET 1/9 D4_OFFSET 2/A S1_OFFSET 3/B S2_OFFSET 4/C DEMOD_ DCOD_ CONTROL reserved 5/D ENVELOPE_ CONTROL 6/E CLIPLEVEL_LE 7/F GAIN_LE
Product data sheet Rev. 03 -- 25 November 2004
(c) Koninklijke Philips Electronics N.V. 2004. All rights reserved. 9397 750 14312
Philips Semiconductors
FDB0 FDB8 FFC0
SWITCH_LE reserved CHPLL_LOCK/ PLL_FREQ_R
LAST_GOOD_ HEADER CHPLL_SET/ CHPLL_ASYM
CONTROL_AD_ STORAGE CHPLL_FREQ/ CHPLL_JIT
LAST_GOOD_ ADDRESS CHPLL_EQU/ CHPLL_LOCK_ IN INT_EN/ INT_STAT DECOMODE/ SUB_C_DATA SRESET
CHPLL_F_ MEAS/ CHPLL_AVG_ JIT MOTOR1/ SLICE1 HFPLLMINMAX/ SUB_C_END CHPLL_SET_2 HFDEFECT DATA
OUTPUT1
reserved
OUTPUT3
FFC8 FFD0 FFD8 FFE0 FFE8 FFF0 FFF8
CLOCKPRE2 MOTOR5 TACHO2 reserved reserved reserved reserved
SEMA2 MOTOR6 TACHO3 HFDEFECT STATUS C1BLER
MEAS_OUT_ EN/AGC_GAIN CLOCKPRE1/ SUB_C_STAT BCASET reserved
MOTOR2/ EYE_OPEN ANASET/ FIFOFILL MOTOR7 HFDEFECT DATAEND
MOTOR3/ TACHO4 VITSET/ BCASTAT reserved reserved
MOTOR4 TACHO1/ BCADATA ANASET2
C2BLER
reserved
DVD and CD playback IC
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8. Limiting values
Table 7: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VDDD(P) VDDD(C) VDDA VI(max) VO IO IIK Tstg Vesd Parameter digital supply voltage for the pad cells (3 V) digital supply voltage for the core (1.8 V) analog supply voltage input voltage on any input output voltage on any output output current continuous DC input diode current continuous storage temperature electrostatic discharge voltage human body model machine model
[4] [5]
Conditions
[1] [2]
Min -0.5 1.65 -0.5 -0.5 -0.5 -55 -1000 -200
Max +4.0 1.95 +4.0 +6.5 20 20 +125 +2000 +200
Unit V V V V mA mA C V V
[2]
[2] [3]
VDD + 0.5 V
[1] [2] [3] [4] [5]
All pad supply connections VDDD(P) must be made externally to the same power supply. All VSS pins must be connected to the same external voltage. When digital inputs are connected to VDDD(P) at 3.3 V, the digital inputs are tolerant to the application of 5 V. Equivalent to discharging a 100 pF capacitor via a 1.5 k series resistor with a rise time of 15 ns. Equivalent to discharging a 200 pF capacitor via a 2.5 H series inductor.
9. Characteristics
Table 8: Supplies VDDD(P) = 3.0 V to 3.6 V; VDDD(C) = 1.65 V to 1.95 V; VDDA = 3.0 V to 3.6 V; VSS = 0 V; Tamb = -40 C to +85 C; unless otherwise specified. Symbol VDDD(C) VDDD(P) VDDA IDDD(C) IDDD(P) IDDA Parameter digital supply voltage for the core digital supply voltage for the pad cells analog supply voltage digital supply current for VDDD(C) = 1.8 V the core digital supply current for VDDD(P) = 3.3 V the pad cells analog supply current VDDA = 3.3 V Conditions Min 1.65 3.0 3.0 Typ 1.8 3.3 3.3 55 135 65 Max 1.95 3.6 3.6 Unit V V V mA mA mA
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DVD and CD playback IC
Table 9: Analog blocks VDDD(P) = 3.3 V; VDDD(C) = 1.8 V; VDDA = 3.3 V VSS = 0 V; Tamb = +25 C; unless otherwise specified. Symbol Pin: IREF VIREF RIREF IIREF Pin: VCOM VVCOM Zo Cext common mode reference voltage output impedance external capacitor on pin VCOM clock sample rate recovered bandwidth effective number of bits differential input signal (peak-to-peak value) differential offset voltage common mode offset voltage ADC offset voltage static input capacitance input resistance group delay clock sample rate recovered bandwidth AGC gain range total harmonic distortion signal-to-noise and distortion of AGC single-ended input signal (peak-to-peak value) static input capacitance input resistance group delay flatness maximum input/output current input voltage gain tolerance 0 MHz to 35 MHz selectable via gain
[1]
Parameter reference voltage on pin IREF external resistor on pin IREF (1 %) output current from pin IREF
Conditions
Min 1.16 47 1.08 47
Typ 1.26 24 50 1.2 -
Max 1.36 53 1.32 10 -
Unit V k A V nF
Pins: HFIN_DN and HFIN_DP fclk B ENOB Vi(dif)(p-p) Vdif(offset) Vcm(offset) VADC(offset) Ci(stat) Ri td(g) Pin: HFIN_SE fclk B G THD S/N Vi(se)(p-p) Ci(stat) Ri td(g) IIO(max) Vi Gtol
9397 750 14312
1/3 Nyquist at 100 MHz 0 dB; depends on VDDA VHFIN_DP to VHFIN_DN -100 -200 -60 input to ground input to input 32 steps fsig = 25 MHz; at Vdif = 1.4 V (p-p) -2.1 0 dB; depends on VDDA1 input to ground 1 -20
46.6 7 2.0 7 3 35 50 1.4 7 8.6 VVRIN 0
100 -
MHz MHz
V 2.0 ------ x V DDA 3.3 +100 +100 +60 100 100 +11.4 -35 mV mV mV pF pF k ps MHz MHz dB dB dB
V 1.4 ------ x V DDA 3.3 600 16 +20 pF k ps A V %
Pins: D1, D2_TLN, D3_REN, D4_FEN, S1_MIRN and S2
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DVD and CD playback IC
Table 9: Analog blocks ...continued VDDD(P) = 3.3 V; VDDD(C) = 1.8 V; VDDA = 3.3 V VSS = 0 V; Tamb = +25 C; unless otherwise specified. Symbol G Parameter variation of gain between channels pins D1 to D2_TLN and D3_REN to D4_FEN pins S1_MIRN to S2 Cpcb(max) fclk B (THD+N)/S maximum parasitic capacitance connected to input sample rate recovered bandwidth total harmonic distortion-plus-noise to signal ratio dynamic range output driving voltage on pin VRIN input voltage on pin VRIN Isink or Isource = 6 A -4.5 -6 8.4672 20 +4.5 +6 25 -40 % % pF MHz kHz dB Conditions Min Typ Max Unit
DR Pin: VRIN Vo(VRIN) Vi(VRIN) Pin: FTCH VFTC(offset) VFTC(hys) Vcm fclk Ci(stat) Ri Vi(UOPB) Vi(UOPT) Vi Vcm G B Ri Ci(stat) Vi G Ri Ci(stat) Ci(dyn)
9397 750 14312
Isink or Isource = 6 A
50 1.0 1.0
1.2 -
-
dB
0.5VDDA2 + V 0.1 0.5VDDA2 + V 0.1 +20 +10 VUOPT 120 VUOPT +1 mV mV V MHz pF k V V V V V kHz k pF V % k pF pF
comparator FTC offset voltage comparator FTC hysteresis common mode voltage clock sample rate static input capacitance input resistance input voltage on pin UOPB input voltage on pin UOPT input voltage common mode voltage gain bandwidth input resistance static input capacitance
[3] [2]
-20 -10 input to ground 100 0 80 0 -1 -
1.67 8.4672 7 1 2.6 0 5 265 100 7 7 5
Pins: UOPB and UOPT
Pins: ACT_EMFP and ACT_EMFN
Pins: SIN_PHI, COS_PHI, XDET and ACT_EMFP input voltage gain matching between channels input resistance static input capacitance dynamic input capacitance
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DVD and CD playback IC
Table 9: Analog blocks ...continued VDDD(P) = 3.3 V; VDDD(C) = 1.8 V; VDDA = 3.3 V VSS = 0 V; Tamb = +25 C; unless otherwise specified. Symbol fclk B ENOB CODEmin(Vin) CODEmax(Vin) Pin: ALPHA0 fclk Vo CL RL fref MULT fout Jclk(rms) tset
[1] [2] [3]
Parameter sample rate recovered bandwidth effective number of bits output code for minimum VUOPB input output code for maximum VUOPT input sample rate output voltage load capacitance load resistance reference frequency multiplication ratios valid output frequencies clock jitter (RMS value) settling time of clock
Conditions
Min 5
Typ 1.05 7.2 5 253
Max 10 255
Unit MHz kHz
at 1.05 MHz
0 251
0 10 8 5 42.336 -
1.05 8.4672 -
VUOPT 25 30 17 24 203.2128 150 60
MHz V pF k MHz MHz ps s
Clock multipliers
Clips at maximum gain setting; input can handle 2 x the maximum signal amplitude. Gain depends on application components. Operating in bypass mode.
Table 10: Digital blocks VDDD(P) = 3.0 V to 3.6 V; VDDD(C) = 1.65 V to 1.95 V; VDDA = 3.0 V to 3.6 V; VSS = 0 V; Tamb = -40 C to +85 C; unless otherwise specified. Symbol Vth(r) Vth(f) Vhys Ci VIL VIH ILI Ci VOL VOH CL Parameter switching threshold rising switching threshold falling hysteresis voltage input capacitance LOW-level input voltage HIGH-level input voltage input leakage current input capacitance LOW-level output voltage HIGH-level output voltage load capacitance IOL = 2 mA IOH = -2 mA Vi = 0 - VDDD(P)
[1]
Conditions
Min 1.4 0.9 0.4 2.0 -10 0.85VDDD(P) -
Typ -
Max 1.9 1.45 0.7 10 0.8 +10 10 0.4 20
Unit V V V pF V V A pF V V pF
Digital inputs: PORE_NEG, HRESET and BCA (Schmitt-trigger inputs); TTL input with hysteresis
Digital inputs designated by `T'; TTL input
Digital outputs designated by `L' (CMOS levels)
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DVD and CD playback IC
Table 10: Digital blocks ...continued VDDD(P) = 3.0 V to 3.6 V; VDDD(C) = 1.65 V to 1.95 V; VDDA = 3.0 V to 3.6 V; VSS = 0 V; Tamb = -40 C to +85 C; unless otherwise specified. Symbol to(r) to(f) Parameter output rise time output fall time Conditions 20 % to 80 % levels; CL = 10 pF 80 % to 20 % levels; CL = 10 pF IOL = 4 mA IOH = -4 mA 20 % to 80 % levels; CL = 10 pF 80 % to 20 % levels; CL = 10 pF Vi = 0 to VDDD(P) IOL = 6 mA IOH = -6 mA 20 % to 80 % levels; CL = 10 pF 80 % to 20 % levels; CL = 10 pF Vi = 0 to VDDD(P) IOL = 4 mA IOH = -4 mA 0.5 V to 0.9VDDD(P); CL = 100 pF 0.9VDDD(P) to 0.5 V; CL = 100 pF IOL = 12 mA IOH = -4 mA 0.5 V to 0.9VDDD(P); CL = 100 pF 0.9VDDD(P) to 0.5 V; CL = 100 pF Min Typ 1.0 1.0 Max Unit ns ns
Digital outputs designated by `M' (CMOS levels) VOL VOH CL to(r) to(f) ILO VOL VOH CL to(r) to(f) ILO VOL VOH CL to(r) to(f) LOW-level output voltage HIGH-level output voltage load capacitance output rise time output fall time 3-state leakage current LOW-level output voltage HIGH-level output voltage load capacitance output rise time output fall time 3-state leakage current LOW-level output voltage HIGH-level output voltage load capacitance output rise time output fall time 0.85VDDD(P) -10 0.85VDDD(P) -10 0.9VDDD(P) 5 5 0.9 0.9 0.8 0.8 0.4 20 +10 0.4 20 +10 0.5 100 V V pF ns ns A V V pF ns ns A V V pF ns ns
Digital outputs designated by `H' (CMOS levels)
Digital outputs designated by `AL' (ATA data bus levels)
Digital outputs designated by `AH' (ATA levels) VOL VOH CL to(r) to(f) LOW-level output voltage HIGH-level output voltage load capacitance output rise time output fall time 0.9VDDD(P) 5 5 0.5 100 V V pF ns ns
Digital input: CRIN (external clock) VIL VIH tIH
9397 750 14312
LOW-level input voltage HIGH-level input voltage input HIGH time relative to period
-0.3 2.0 45
-
+0.5 55
V %
VDDA + 0.3 V
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Product data sheet
Rev. 03 -- 25 November 2004
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Philips Semiconductors
SAA7818HL
DVD and CD playback IC
Table 10: Digital blocks ...continued VDDD(P) = 3.0 V to 3.6 V; VDDD(C) = 1.65 V to 1.95 V; VDDA = 3.0 V to 3.6 V; VSS = 0 V; Tamb = -40 C to +85 C; unless otherwise specified. Symbol ILI Ci fxtal gm Cfb Co Rbias
[1] [2]
Parameter input leakage current input capacitance crystal frequency mutual conductance at start-up feedback capacitance output capacitance internal bias resistor
Conditions
Min -10 [2]
Typ 8.4672 17 200
Max +10 7 2 7 -
Unit A pF MHz mA/V pF pF k
Output: CROUT -
Input leakage does not apply to EAN_WAITN, PSENN_CS and ALE_STB, as these pins have internal pull-up resistors. It is recommended that the nominal running series resistance of the crystal or ceramic resonator is 60 .
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DVD and CD playback IC
10. Package outline
LQFP208; plastic low profile quad flat package; 208 leads; body 28 x 28 x 1.4 mm SOT459-1
c
y X
A
156 157 105 104
ZE
e E HE
A A2 A1
(A 3) Lp L detail X
wM bp pin 1 index
208 53 1 52
e
bp D HD
wM
ZD B
vM A
vM B
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.6 A1 0.15 0.05 A2 1.45 1.35 A3 0.25 bp 0.27 0.17 c 0.20 0.09 D (1) 28.1 27.9 E (1) 28.1 27.9 e 0.5 HD HE L 1 Lp 0.75 0.45 v 0.12 w 0.08 y 0.08 ZD 1.43 1.08 ZE 1.43 1.08 7o o 0
30.15 30.15 29.85 29.85
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT459-1 REFERENCES IEC 136E30 JEDEC MS-026 JEITA EUROPEAN PROJECTION
ISSUE DATE 00-02-06 03-02-20
Fig 3. Package outline LQFP208 (SOT459-1).
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Product data sheet
Rev. 03 -- 25 November 2004
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DVD and CD playback IC
11. Soldering
11.1 Introduction to soldering surface mount packages
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended.
11.2 Reflow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Driven by legislation and environmental forces the worldwide use of lead-free solder pastes is increasing. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 seconds and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 C to 270 C depending on solder paste material. The top-surface temperature of the packages should preferably be kept:
* below 225 C (SnPb process) or below 245 C (Pb-free process)
- for all BGA, HTSSON..T and SSOP..T packages - for packages with a thickness 2.5 mm - for packages with a thickness < 2.5 mm and a volume 350 mm3 so called thick/large packages.
* below 240 C (SnPb process) or below 260 C (Pb-free process) for packages with a
thickness < 2.5 mm and a volume < 350 mm3 so called small/thin packages. Moisture sensitivity precautions, as indicated on packing, must be respected at all times.
11.3 Wave soldering
Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results:
* Use a double-wave soldering method comprising a turbulent wave with high upward
pressure followed by a smooth laminar wave.
* For packages with leads on two sides and a pitch (e):
- larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board;
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- smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end.
* For packages with leads on four sides, the footprint must be placed at a 45 angle to
the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time of the leads in the wave ranges from 3 seconds to 4 seconds at 250 C or 265 C, depending on solder material applied, SnPb or Pb-free respectively. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.
11.4 Manual soldering
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 seconds to 5 seconds between 270 C and 320 C.
11.5 Package related soldering information
Table 11: Package [1] BGA, HTSSON..T [3], LBGA, LFBGA, SQFP, SSOP..T [3], TFBGA, VFBGA, XSON DHVQFN, HBCC, HBGA, HLQFP, HSO, HSOP, HSQFP, HSSON, HTQFP, HTSSOP, HVQFN, HVSON, SMS PLCC [5], SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO, VSSOP CWQCCN..L [8], PMFP [9], WQCCN..L [8]
[1] [2]
Suitability of surface mount IC packages for wave and reflow soldering methods Soldering method Wave not suitable not suitable [4] Reflow [2] suitable suitable
suitable not not recommended [5] [6] recommended [7]
suitable suitable suitable not suitable
not suitable
For more detailed information on the BGA packages refer to the (LF)BGA Application Note (AN01026); order a copy from your Philips Semiconductors sales office. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods. These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature exceeding 217 C 10 C measured in the atmosphere of the reflow oven. The package body peak temperature must be kept as low as possible.
[3]
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DVD and CD playback IC
[4]
These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. Image sensor packages in principle should not be soldered. They are mounted in sockets or delivered pre-mounted on flex foil. However, the image sensor package can be mounted by the client on a flex foil by using a hot bar soldering process. The appropriate soldering profile can be provided on request. Hot bar soldering or manual soldering is suitable for PMFP packages.
[5] [6] [7] [8]
[9]
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12. Revision history
Table 12: Revision history Release date 20041125 Data sheet status Product data sheet Product data sheet Product specification Change notice Doc. number 9397 750 14312 9397 750 14026 9397 750 11111 Supersedes SAA7818HL_2 SAA7818HL_1 Document ID SAA7818HL_3 Modifications: SAA7818HL_2 SAA7818HL_1
*
Table 7: Table note 3; VDDD(C) changed into VDDD(P)
20041025 20030923
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13. Data sheet status
Level I II Data sheet status [1] Objective data Preliminary data Product status [2] [3] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
III
Product data
Production
[1] [2] [3]
Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
14. Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. ICs with CD functionality -- Purchase of a Philips IC with CD functionality does not convey an implied license under any patent right to use this IC in any CD application. A license needs to be obtained via Philips Intellectual Property & Standards (www.ip.philips.com), e-mail: info.licensing@philips.com. ICs with DVD functionality -- Purchase of a Philips IC with DVD functionality does not convey an implied license under any patent right to use this IC in any DVD application. A license needs to be obtained via Philips Intellectual Property & Standards (www.ip.philips.com), e-mail: info.licensing@philips.com.
15. Disclaimers
Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or
16. Licenses
Purchase of Philips I2C-bus components Purchase of Philips I2C-bus components conveys a license under the Philips' I2C-bus patent to use the components in the I2C-bus system provided the system conforms to the I2C-bus specification defined by Koninklijke Philips Electronics N.V. This specification can be ordered using the code 9398 393 40011.
17. Contact information
For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
9397 750 14312
(c) Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 -- 25 November 2004
29 of 30
Philips Semiconductors
SAA7818HL
DVD and CD playback IC
18. Contents
1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 11.1 11.2 11.3 11.4 11.5 12 13 14 15 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 4 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 6 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6 Register and memory map . . . . . . . . . . . . . . . 13 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 18 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 18 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 24 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Introduction to soldering surface mount packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 25 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 25 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 26 Package related soldering information . . . . . . 26 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 28 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 29 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Licenses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Contact information . . . . . . . . . . . . . . . . . . . . 29
(c) Koninklijke Philips Electronics N.V. 2004
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 25 November 2004 Document number: 9397 750 14312
Published in The Netherlands

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